
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
16
SSTE32882KA1
7314/8
THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE
SSTE32882KA1
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
COMMERCIAL TEMPERATURE RANGE
Absolute Maximum Ratings
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect reliability
DC and AC Specifications
The SSTE32882KA1 parametric values are specified for the device default control word settings, unless otherwise stated. Note that
RC10 setting does not affect any of the paramteric values.
Symbol
Parameter
Conditions
Min
Max
Unit
AVDD, PVDD,
VDD
Supply voltage
–0.4
+1.975
V
VI
Receiver input voltage1
1
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are
observed. This value is limited to 1.975 V maximum.
–0.4
VDD +0.5
V
VREF
Reference voltage
–0.4
VDD +0.5
V
VO
–0.4
VDD +0.5
V
IIK
Input clamp current
VI < 0 or VI > VDD
-50
mA
IOK
Output clamp current
VO < 0 or VO > VDD
±50
mA
IO
Continuous output current
0 < VO < VDD
±50
mA
ICCC
Continuous current through each VDD or GND pin
±100
mA
TSTG
Storage temperature
–65
+150
°C
R
θJA
Package Thermal Impedance, Junction-to-Ambient2
2
The package thermal impedance is calculated in accordance with JESD51-2.
0m/s Airflow
43.8
°C/W
1m/s Airflow
35.5
R
θJB
Package Thermal Impedance, Junction-to
-Board222
°C/W
R
θJC
Package Thermal Impedance, Junction-to-Case
216.2
°C/W